The invention relates to a field effect transistor comprising a vertical arrangement of the source, gate and drain in which the gate electrode comprises a rectifying metal/semiconductor contact and is applied to a side or edge surface of the semiconductor body or to the channel in a depression in the semiconductor body between the source and the drain. Such an arrangement is known from U.S. Pat. No. 3,761,785. The channel is formed in this known arrangement by a conducting semiconductor layer between a drain and a source region. This channel region extends over the entire cross section of the drain region and the inclined side surface of the channel region is provided with a Schottky gate contact.